Poly1305 family of accelerators
The Poly-IP-53 is a family of the cryptographic library elements in Inside Secure’s HW IP library. For example, the Poly-IP-53 is the cipher core embedded in the Vault-IP-140 platform security engines providing support for TLS1.3 and HomeKit IoT applications (Poly1305 is also available as SW implementation in Vault-IP-140). The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.
Sustained performance for any object sizes ranges from 1Gbps to 6.4Gbps depending on the configuration and area. Gate count is around 50K gates depending on the configuration.
Inside Secure also offers the required ChaCha20 cipher to match the Poly1305 algorithm to match the HomeKit.
- Silicon-proven implementation
- Fast and easy to integrate into SoCs
- Flexible layered design
- Complete range of configurations
- World-class technical support
- Wide bus interface (128 bit data, 128 bit keys, 135 bit digest) or 32 bit register interface
- Key size: 128 bits
- Includes initialization stage
- Supports continuation mode
- Fully synchronous design