ARC4 family of accelerators.
Available in several configurations / performance grades.
Library element for security packet engines.
The ARC4-IP-44 is a family of the cryptographic library elements in Inside Secure’s HW IP library. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.
Sustained performance for any object sizes ranges up to 5Gbps depending on the configuration and area. Gate count is about 7k to 32k gates depending on the configuration.
Inside Secure also offers the AES-IP-39 / EIP-39 that supports AES modes and can be provided including counter measures against side channel attacks and fault injection attacks.
- Silicon-proven implementation.
- Fast and easy to integrate into SoCs.
- Flexible layered design.
- Complete range of configurations.
- World-class technical support.
- Wide bus interface (32 bit data, 128 bit keys) or 32 bit register interface.
- Key sizes: 40 and 128 bits.
- Fully synchronous design.
- AES-IP-32 / EIP-32 AES ECB accelerators
- AES-IP-36 / EIP-36 AES ECB/CBC/CTR accelerators
- AES-IP-37 / EIP-37 AES Key Wrap accelerators
- AES-IP-38 / EIP-38 AES XTS/GCM accelerators
- AES-IP-39 / EIP-39 AES ECB/CBC/CTR/CCM/GCM accelerators