Inside Secure Root-of-Trust is a comprehensive platform security solution which protects the SoC, its identity, its secrets, its integrity and its operations. In the SoC, Inside Secure Root-of-Trust is the vault that guards security sensitive assets, a vault locked from the inside.
A complete solution comprising of a family of MACsec Security IP and a MACsec software toolkit targeting PHY devices, switches, bridges, and routers for Layer 2 LAN and Metro Ethernet communications. The MACsec engines target deployments in data centers, 5G base stations, enterprise networks, home gateways, IP phones and more. Build Ethernet switch fabrics and PHY devices using MACsec engines to reach speeds from 1Gbps, 10Gbps, 100Gbps, 400Gbps and beyond. The IP provides a complete and standard compliant MACsec solution, which ensures auditable compliance while reducing development cost and time to market.
Unlike simple crypto-only accelerators, intelligent packet engines contain complete protocol knowledge, delivering the benefits of throughput acceleration and CPU offload. The Multi-Protocol Engine IPs offer acceleration of IPsec, MACsec, SSL/TLS/DTLS, sRTP and basic hash-crypto operations at target speeds ranging from 100Mbps to 50Gbps and beyond, in architectures ranging from the traditional look-aside engines to the more sophisticated, powerful inline packet engines.
Inside Secure’s cryptographic algorithm accelerator IP cores are standalone hardware IP cores for accelerating various symmetric, asymmetric ciphers, HASH and HMAC-based integrity algorithms, as well as true random number generators (TRNG). Vault IP cryptographic engines can be used for accelerating applications for storage, LTE, PKI/PKA infrastructure, HDCP.
Inside Secure’s cipher accelerator IP cores are standalone hardware IP cores for accelerating various symmetric and asymmetric cryptographic primitive algorithms. These cores are also embedded in packet engines as well as Vault-IP products.
Inside Secure’s Hash and HMAC accelerator IP cores are standalone hardware IP cores for accelerating various HASH and HMAC-based integrity algorithms. These cores are also embedded in packet engines as well as Vault-IP products.