Inside Secure Root-of-Trust is a comprehensive platform security solution which protects the SoC, its identity, its secrets, its integrity and its operations. In the SoC, Inside Secure Root-of-Trust is the vault that guards security sensitive assets, a vault locked from the inside.
Designed to be integrated in power constrained microcontroller or complex SoC, Inside Secure Root-of-Trust Engine is the vault that guards the chip most sensitive assets and that establishes the platform security foundations.
Acting as a vault in the SoC, Inside Secure Programmable Root-of-Trust is a flexible and customizable module that hosts and protects the execution of the platform most sensitive applications.
Inside Secure Provisioning Platform enables secure silicon for chip makers and OEMs throughout the device lifecyle.
SypherMedia Library (SML) Circuit Camouflage Technology protects integrated circuits against Reverse Engineering and Cloning.
A complete solution comprising of a family of MACsec Security IP and a MACsec software toolkit targeting PHY devices, switches, bridges, and routers for Layer 2 LAN and Metro Ethernet communications. The MACsec engines target deployments in data centers, 5G base stations, enterprise networks, home gateways, IP phones and more. Build Ethernet switch fabrics and PHY devices using MACsec engines to reach speeds from 1Gbps, 10Gbps, 100Gbps, 400Gbps and beyond. The IP provides a complete and standard compliant MACsec solution, which ensures auditable compliance while reducing development cost and time to market.
The MACsec-IP-163/164 (EIP-163/164) is an IP family for accelerating MACsec up to 500 Gbps, serving multi channel timesliced ethernet designs, including FlexEthernet up to 500Gbps. The MACsec-IP-163/164 is a high-performance streaming MACsec frame processing engine that provides hardware acceleration for the complete MACsec frame transform along with frame classification and statistics counter updates. Once the MACsec-IP-163/164 is configured, no CPU is required for processing tasks.
The MACsec-IP-165 (EIP-165) is an IP family for accelerating MACsec up to 100 Gbps, serving single channel PHY designs. The MACsec-IP-165 is a high-performance streaming MACsec frame processing engine that provides hardware acceleration for the complete MACsec frame transform along with frame classification and statistics counter updates. Once the MACsec-IP-165 is configured, no CPU is required for processing tasks.
The MACsec-IP-160 (EIP-160) is an IP family for accelerating MACsec up to 100 Gbps, serving single channel Ethernet designs. The MACsec-IP-160 is a high-performance streaming MACsec frame processing engine that provides hardware acceleration for the complete MACsec frame transform along with frame classification and statistics counter updates. Once the MACsec-IP-160 is configured, no CPU is required for processing tasks.
Unlike simple crypto-only accelerators, intelligent packet engines contain complete protocol knowledge, delivering the benefits of throughput acceleration and CPU offload. The Multi-Protocol Engine IPs offer acceleration of IPsec, MACsec, SSL/TLS/DTLS, sRTP and basic hash-crypto operations at target speeds ranging from 100Mbps to 50Gbps and beyond, in architectures ranging from the traditional look-aside engines to the more sophisticated, powerful inline packet engines.
The EIP-93 Multi-Protocol Engine is a protocol aware packet engine IP for accelerating IPSec, SSL/TLS, and SRTP up to 300Mbps in SoCs. Designed for fast integration, low gate count and full transforms, the EIP-93 provides a reliable and cost-effective embedded IP solution that is easy to integrate into SoC designs.
The EIP-97 Multi-Protocol Engine is a protocol aware packet engine IP for accelerating IPSec, SSL/TLS, SRTP and MACsec up to 2000Mbps in multi-core SoCs offering a large selection of cipher algorithms. Designed for fast integration, low gate count and full transforms, the EIP-97 packet engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into multi-core SoC designs.
The EIP-98 Multi-Protocol Engine is a protocol aware packet engine IP for accelerating IPSec, SSL/TLS, DTLS, SRTP and MACsec up to 2000Mbps in multi-core application or communication processors offering a large selection of cipher algorithms. Designed for fast integration, maximum CPU offload and offering full transforms, the EIP-98 packet engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into multi-core SoC designs.
The EIP-197 Multi-Protocol Engine is an IP family for accelerating IPSec, SSL/TLS, DTLS(CAPWAP), SRTP and MACsec up to 5, 10, 20, 40 or 50 Gbps in multi-core server, communication or network processors offering a large selection of cipher algorithms. Designed for fast integration, maximum CPU offload and offering full transforms, the EIP-197 provides a reliable and effective embedded IP solution that is easy to integrate into multi-core servers, communication and network processors.
Inside Secure’s cryptographic algorithm accelerator IP cores are standalone hardware IP cores for accelerating various symmetric, asymmetric ciphers, HASH and HMAC-based integrity algorithms, as well as true random number generators (TRNG). Vault IP cryptographic engines can be used for accelerating applications for storage, LTE, PKI/PKA infrastructure, HDCP.
The PacketEngine-IP-96 (EIP-96) is IP for accelerating IPSec, SSL/TLS, SRTP and MACsec transforms up to 5Gbps offering a large selection of cipher algorithms. Designed for fast integration, low gate count and full transforms, the PacketEngine-IP-96 transform engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
The AES-IP-61 (EIP-61) is IP for accelerating AES-GCM based cryptographic solutions. Designed for easy integration and very high performance the AES-IP-61 crypto accelerator provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
The TRNG-IP-76 (EIP-76) is a FIPS approved IP core for true random number generation. Designed for easy integration the 100% digital standard cell based TRNG-IP-76 random number generator provides a reliable and cost-effective Embedded IP solution for our customer’s SoCs.
The HDCP-IP-114 (EIP-114) is IP for accelerating the high-speed cipher operation specified by HDCP 1.x and 2. Designed for fast integration, low gate count and full transforms, the HDCP-IP-114 transform engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
CRYPT-IP-120 (EIP-120) is IP for combining local key storage, AES cipher (AES-IP-39), SHA-2 hash (HASH-IP-57) and DMA capability. Designed for fast integration, low gate count and full transforms, the CRYPT-IP-120 DMA crypto engine provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed processing pipelines.
Inside Secure’s cipher accelerator IP cores are standalone hardware IP cores for accelerating various symmetric and asymmetric cryptographic primitive algorithms. These cores are also embedded in packet engines as well as Vault-IP products.
PKA-IP-28 (EIP-28) is a family of IP cores designed for full scalability and an optimal performance over gate count ratio. The PKA-IP-28 public key accelerators address the unique needs of semiconductor OEMs and provide a reliable and cost-effective IP solution that is easy to integrate into SoC designs. The PKA-IP-28 can be deployed in any semiconductor design that needs key exchange or key generation at high performance or in low power consumption.
The PKA-IP-150 (EIP-150) is a family of IP cores designed for full scalability and an optimal performance over gate count ratio. The PKA-IP-150 public key accelerators address the unique needs of semiconductor OEMs and provide a reliable and cost-effective IP solution that is easy to integrate into SoC designs. The PKA-IP-150 can be deployed in any semiconductor design that needs key exchange or key generation at high performance or in low power consumption.
The PKA-IP-150 public key accelerators combine the PKA-IP-28, TRNG-IP-76 with an AMBA interface such as AXI or AHB.
The PKI-IP-154 (EIP-154) is a family of IP cores designed for full scalability and an optimal performance over gate count ratio. The PKI-IP-154 implements a farm of PKA-IP-28 public key accelerators to address the needs very high key generation and key exchange solutions. The PKA-IP-154 can be deployed in any semiconductor design that needs key exchange or key generation at extreme high performance. The PKI-IP-154 public key accelerators combine an array of PKA-IP-28, TRNG-IP-76 with an AMBA interface such as AXI or AHB.
The AES-IP-36 (EIP-36) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting ECB, CBC and CTR modes up to 12.8Gbps @1GHz. Designed for fast integration, low gate count and full transforms, the AES-IP-36 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The AES-IP-37 (EIP-37) is IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394) up to 6Gbps. Designed for fast integration, low gate count and full transforms, the AES-IP-37 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into SoCs that need high speed key wrap and (key) storage or key import and export systems.
The AES-IP-38 (EIP-38) is IP for accelerating the AES symmetric cipher algorithm supporting GCM or XTS modes at extreme speeds up to 100Gbps+ @850MHz. Designed for fast integration, fast key switching and high performance, the AES-IP-38 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines. The IP supports Cipher Text Stealing (CTS) in combination with AES-XTS.
The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including ECB, CBC, CTR, CFB, OFB, CCM, GCM, CBC-MAC, CMAC, XTS, F8, F9 modes of operation up to 6.4Gbps @1GHz. Designed for fast integration, low gate count and full transforms, the AES-IP-39 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into security modules needing versatile crypto.
The Kasumi-IP-06 cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified in 3GPP TS 35.201 and 3GPP TS 35.202. Designed for fast integration, low gate count and full transforms, the Kasumi-06 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
The SNOW-IP-46 cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI. Designed for fast integration, low gate count and full transforms, the SNOW-IP-46 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
The ZUC-IP-48 cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI. Designed for fast integration, low gate count and full transforms, the ZUC-IP-48accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
The ChaCha-IP-13 (EIP-13) is IP for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8Gbps @300MHz. Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The 3DES-IP-16 (EIP-16) is IP for accelerating the AES symmetric cipher algorithm (FIPS-46/81 – SP800-IP-20), supporting single Des and triple DES in ECB, CBC, CFB and OFB modes up to 4Gbps @800MHz. Designed for fast integration, low gate count and full transforms, the 3DES-IP-16 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The Multi-IP-17 (EIP-17) is IP for accelerating the Multi2 cipher algorithm, supporting ECB, CBC, CFB and OFB modes up to 2Gbps @600MHz. Designed for fast integration, low gate count and full transforms, the Multi-IP-17 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The Camellia-IP-18 (EIP-18) is IP for accelerating the Camellia cipher algorithm (RFC3713), supporting ECB, CBC, CFB and OFB modes up to 2Gbps @300MHz. Designed for fast integration, low gate count and full transforms, the Camellia-IP-18 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The C2-IP-19 (EIP-19) is IP for accelerating the C2 cipher algorithm up to 1Gbps @300MHz. Designed for fast integration, low gate count and full transforms, the C2-IP-19 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5bps @600MHz. Designed for fast integration, low gate count and full transforms, the ARC4-IP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
Inside Secure’s Hash and HMAC accelerator IP cores are standalone hardware IP cores for accelerating various HASH and HMAC-based integrity algorithms. These cores are also embedded in packet engines as well as Vault-IP products.
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC mode up to 6.4Gbps @450MHz. Designed for fast integration, low gate count and full transforms, the HASH-IP-57 accelerators provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), up to 8Gbps. Designed for fast integration, low gate count and full transforms, the HMAC-IP-59 accelerators provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
Poly-IP-53 (EIP-53) is IP for accelerating the Poly1305 hash-based message authentication algorithm (RFC7539), supporting the NIST MAC mode up to 6.4Gbps @450MHz. Designed for fast integration, low gate count and full transforms, the Poly-IP-53 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
Inside Secure Provisioning Platform enables secure silicon for chip makers and OEMs throughout the device lifecyle.
SypherMedia Library (SML) Circuit Camouflage Technology protects integrated circuits against Reverse Engineering and Cloning.